GadgetHolic

The memory chips are branded Intel 29F16B08CCME2, while the controller is the new SandForce SF-2281TB1, let’s see the main technical features, starting from the controller.

Interleaving

The SF-2281 has 8 channels of communication and as we have seen that there are 16 chips on the PCB NAND Flash, this means that each channel has two modules. Obviously you can not simultaneously transfer data to or from two chips at a time but thanks to advanced techniques of interleaving can still take advantage of this situation. The processes of reading and writing NAND Flash because they are not direct but are managed by an intermediate level represented by a log that contains the data exchange between the controller and the chip and it takes several cycles to perform each operation. It is therefore possible, precisely due to interleaving techniques, ie simultaneous transmission of different types of data, obtaining a highly parallel, a little ‘as for example in the GPU pipeline. It will be possible to forward such a read request to a module and, while it’ll be performing the operations of fetching the required data in the register, the controller can simultaneously send another request to another module placed on the same channel, thus saturating the best each communication channel.

In theory this would mean to transmit twice as much data per clock cycle and, although this does not happen exactly in reality due to a number of limitations (eg it is not said that the two operations also require the same number of cycles per be completed), we have still much better performance, if not twice.

 

This type of parallelism also covers even the single NAND chip. The new MLC NAND Flash modules Intel IMFT are in fact made ??with 25 nm manufacturing process. The transition from 34 to 25 nm has resulted in a higher density. In fact, the same day area is now possible to have a capacity double. This means being able to make better use of silicon wafers and then to decrease production costs, but it is not the only advantage. Through a process of miniaturization will be possible to have more fact than die in a single package and the initials of these Intel tells us that each contain two dies. In this way, and always with interleaving techniques, can be transmitted simultaneously read and write requests in each individual package, addressing the two day. Once again you will not get an exact doubling of performance, it is possible to transmit data of one day at a time, but will still allow a wider parallel to obtain a greater flow of data per unit time and clock cycle.

OVERPROVISIONING AND RAISE

The novelty introduced by the second generation of SandForce not end there however.Previously these chips using a technique called data security RAISE (Redundant Array of Independent Silicon Elements), similar to RAID 5. This solution allows the drive to continue to operate without losing the data even if a single-die NAND flash chips would be damaged or stop working. In fact, the controller writes the parity data on all day SSD. The lost files can then be reconstructed from the remaining ones, integrating them with those of their own gender. To do this it is obvious that the units contain more space than we have in fact exploited and seen as the unity in our possession, 240 GB, 16 actually mounts NAND flash chips with 16 GB each, for a total of 256 GB.

This technique is called overprovisioning and consists in providing a unit which contains extra space, which can be exploited by these technologies necessary security. But now the new SandForce SF-2281 requires less than 6% of the total space to carry out such operations, while the SF-1200 needed more than 11%.

DURAWRITE, TRIM and Wear Leveling

Another problem is that the NAND flash memories have a limited cycle of rewriting, and this number tends to decrease as the lithography process becomes more stringent. At 25 nm the cycle is expected to 5000 rewrites. Moreover, in a NAND flash memory cells are not always written all in a homogeneous and cyclical, but it happens rather often that some have re-written more times than others and can therefore reach its limit first writing, thus making the disc unusable in less time than the theoretical expected.

To overcome this problem there is a technology called Wear Leveling that keeps track of which cells have already been written and how many times and consequently distributes the data to take advantage of all the cells in a more homogeneous as possible.

The OCZ Vertex 3 also natively supports also the Trim command, deployed in next-generation operating systems in order to better interact with the SSD. Basically, the command disables automatic defragmentation operations (a series of reads and writes data to optimize, on a fact that SSDs are not only necessary but even harmful) and solves another problem, also linked to the need to restrict reads and writes . In a normal HDD, in fact, when you delete a file, this is only logically deleted, ie to make the space available for new entries: this will happen only when the data is actually overwritten by new data because it deleted.

If an operating system, however, manage dependencies things the same way with an SSD, it would lead to a myriad of micro-operations at the same time worsen the performance of the disc and decrease the durability. TRIM then so that the cancellation logic and physical match in a single operation. But SandForce controller also has a proprietary technology, always aiming to reduce as much as possible read and write cycles, and called DuraWrite already present in the previous generation, but here further improved. In practice, this implementation of aparticular compression algorithm on-the-fly, which reduces the amount of data to be written on the drive. In this way, according to SandForce, 20 GB of data can be written in no more than 10 GB of space.

Finally, the new SandForce has better security features than the previous series of datathrough the integration of technology TCG OPAL 256-bit AES encryption for data (the SandForce SF-1222 stopped the 128-bit) and a motor ECC error correction control improved.

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